Jiajun Hu
2 indexed papers
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226
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Distributed×1Performance×1Architecture×1
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2026
Boosting FPGA Performance with Direct BRAM-DSP Paths
This paper proposes a lightweight architectural enhancement for FPGA designs to improve data movement between block RAMs and digital signal processing units for deep learning workloads, incurring negligible area and delay overhead.
FSZ: Breaking the Prediction-Throughput Trade-off in GPU Lossy Compression
This paper proposes FSZ, a GPU error-bounded lossy compressor with three innovations for higher compression ratios and throughput within a single CUDA kernel.
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