~ similar to 2604.15810v1· 20 results
The paper proposes a dynamically reconfigurable resistor-capacitor (RC)-based Physically Unclonable Function (PUF) that demonstrates strong resistance against advanced machine learning and deep learni…
Xin Wang, Peichun Hua, Chip Hong Chang, Wenye Liu +1 more
The paper proposes a scalable, helper-data-free open-set framework using an OpenGAN-based classifier to unify authentication for diverse and large populations of heterogeneous PUF-based IoT devices.
This survey reviews hardware-rooted trust mechanisms, such as PUFs and TPMs, demonstrating that hardware-based solutions are superior to software-only methods for ensuring secure authentication and AI…
The paper presents a highly optimized, low-stack implementation of the HAETAE signature scheme, reducing peak stack usage significantly to enable its use on severely memory-constrained microcontroller…
The paper proposes QT-PUF, a novel quantum tunneling leakage-based Physical Unclonable Function (PUF) designed for ultralow-power, implantable IoMT devices, achieving high reliability and minimal powe…
LIPPEN introduces a novel hardware-software co-design that provides strong, zero-overhead pointer encryption for enhanced memory safety, achieving comprehensive pointer integrity and confidentiality.
LiteAtt introduces a verifier-less, Peer-to-Peer Self-Attestation (P2P-SA) framework for modern IoT MCUs, enabling mutual authentication and firmware attestation directly within the connection handsha…
This paper investigates the potential of real-world Processing-in-Memory (PIM) architectures, specifically using UPMEM, to accelerate cryptographic algorithms, demonstrating that distributing computat…
CHRONOS is a hardware-assisted framework that significantly reduces the latency of secure federated learning by decoupling cryptographic key setup from the active training phase, while maintaining hig…
The paper proposes a graduated trust gating mechanism for IoT location verification that moves beyond binary decisions, allowing systems to dynamically escalate verification rigor based on signal inte…
The paper introduces a novel toolkit to enhance RISC-V Trusted Execution Environments (TEEs) by adding modular extensions for secure enclave update, migration, state continuity, and trusted time, ther…
This paper evaluates the security of Universal Circuits (UCs) for hardware obfuscation, demonstrating that they are effective against both oracle-guided and oracle-less attacks.
This paper provides the first systematic, isolated benchmarks of NIST-standardized post-quantum cryptography (ML-KEM and ML-DSA) on the highly constrained ARM Cortex-M0+ processor, showing performance…
This paper models PIN entry as a stochastic communication channel, proposing a probabilistic inference framework to quantify reliability loss and QoS degradation caused by partial information leakage.
The paper proposes Q-FE, a novel Quantum-Native 6G Far-Edge architecture that secures Industrial IoT Digital Twins by integrating micro-digital twins, compact post-quantum key exchange, and asynchrono…
Jianan Mu, Ge Yu, Zhaoxuan Kan, Song Bian +5 more
This paper evaluates the vulnerability of Fully Homomorphic Encryption (FHE) computation to silent data corruption (SDC) using large-scale fault-injection experiments and theoretical analysis.
The paper introduces Search-Bound Proximity Proofs (SBPP) to close an authorization provenance gap in encrypted geographic search by binding zero-knowledge proofs to specific search sessions for audit…
The paper proposes a UEFI system utilizing SPDM to authenticate connected PCIe and USB devices, successfully demonstrating that this enhanced security mechanism introduces an acceptable processing ove…
Xi Yang, Taolue Chen, Yuqi Chen, Fu Song +2 more
This paper introduces a novel algorithm, CiSC, to efficiently and optimally synthesize circuit implementations of linear codes for hardware security, significantly outperforming existing state-of-the-…
Md Rahatul Islam Udoy, Diego Ferrer, Wantong Li, Kai Ni +2 more
The paper proposes SecurePix, a compact CMOS-compatible pixel architecture that achieves true in-pixel encryption using FeFETs, demonstrating strong image security and low power overhead.