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~ similar to 2605.29994· 17 results

cs.LGRecentJun 1, 2026

ArrythML: An Autoencoder-Based TinyML Approach for On-Device Arrhythmia Detection on Resource-Constrained Embedded Systems

Nagarajan S, Kurian Polachan

The paper introduces ArrythML, a highly efficient autoencoder-based TinyML model that enables accurate, low-power arrhythmia detection directly on resource-constrained embedded wearable devices.

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cs.LGcs.AIcs.CRRecentMay 15, 2026

Towards Family-Grouped Hierarchical Federated Learning on Sub-5KB Models: A Feasibility Study of Privacy-Preserving ECG Monitoring for Ultra-Resource-Constrained Wearables

Hangyu Wu

The paper proposes Family-Grouped Hierarchical Federated Learning (Family-FL) combined with a highly optimized Tiny CNN-LSTM model to enable privacy-preserving ECG monitoring on ultra-resource-constra…

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cs.AREmpiricalRecentJun 10, 2026

BenDi: An Energy-Efficient Quasi-Stochastic Systolic Architecture for Edge Bioelectronics

Bochen Ye, Yihan Pan, Shady Agwa, Themis Prodromakis

This paper presents BenDi, an energy-efficient quasi-stochastic systolic architecture for bioelectronic systems on the edge.

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cs.ARcs.MSRecentJun 3, 2026

GoldenFloat: A Phi-Derived Static-Split Floating-Point Family from GF4 to GF256 with a Lucas-Exact Integer Identity

Dmitrii Vasiliev

This paper presents a hardware-oriented description of GoldenFloat, a static-split floating-point family, and its concrete artefacts.

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cs.CVcs.AIcs.CRRecentMay 17, 2026

Attention-Guided Fusion of 1D and 2D CNNs for Robust ECG-Based Biometric Recognition

Arioua, Islameddine, Benzaoui, Amir +4 more

The paper proposes an attention-guided hybrid framework combining 1D and 2D CNNs to robustly enhance ECG-based biometric recognition, achieving high accuracy across multiple datasets and demonstrating…

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cs.SDcs.AReess.ASRecentJun 2, 2026

Feasibility of Time-Domain DNN-Based Speech Enhancement on Embedded FPGA for Hearing Aid

Feyisayo Olalere, Umut Altin, Kiki van der Heijden, Marcel van Gerven

This paper characterizes the gap between current DNN-based speech enhancement systems and hearing aid constraints, and proposes a lightweight architecture to meet these constraints.

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cs.ARcs.AIcs.NERecentJun 4, 2026

ITP-STDP: An Intrinsic-Timing Power-of-Two Learning Engine for On-Chip SNN Training

Haihang Xia, Xinyu Zhao, Xuecheng Wang, John Goodenough +4 more

This paper proposes and validates a novel hardware architecture, ITP-STDP, to significantly reduce the energy consumption and hardware overhead associated with training Spiking Neural Networks (SNNs).

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cs.LGeess.SPq-bio.QMEmpiricalRecentJun 9, 2026

A Comprehensive Inference-Time Augmentation Framework in Physiological Signals: Application to PPG-Based AF Detection

Davood Fattahi, Runze Yan, Saurabh Kataria, Zhaoliang Chen +1 more

This paper proposes a unified framework for inference-time augmentation to improve the robustness of physiological signal classification in real-world deployments.

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cs.LGeess.SPq-bio.QMEmpiricalRecentJun 9, 2026

A Comprehensive Inference-Time Augmentation Framework in Physiological Signals: Application to PPG-Based AF Detection

Davood Fattahi, Runze Yan, Saurabh Kataria, Zhaoliang Chen +1 more

This paper proposes a unified framework for inference-time augmentation to improve the robustness of physiological signal classification in real-world deployments.

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cs.CRcs.LGRecentMar 25, 2026

Efficient Encrypted Computation in Convolutional Spiking Neural Networks with TFHE

Longfei Guo, Pengbo Li, Ting Gao, Yonghai Zhong +2 more

The paper introduces FHE-DiCSNN, a novel framework that uses the TFHE scheme to enable secure and efficient computation on Spiking Neural Networks (SNNs), achieving high accuracy and fast inference ti…

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cs.CRcs.LGRecentJun 2, 2026

Long-Term and Short-Term Transistor Aging in Deep Neural Networks: Impact and Mitigation

Alireza Sarmadi, Virinchi Roy Surabhi, Prashanth Krishnamurthy, Hussam Amrouch +2 more

This paper analyzes the impact of long-term and short-term transistor aging on Deep Neural Network (DNN) inference accuracy and proposes an aging-aware retraining methodology to maintain performance e…

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eess.IVcs.AIcs.CVRecentMay 27, 2026

Deep Learning Strain Estimation: Is Physics-Based Simulation the Solution?

Thierry Judge, Nicolas Duchateau, Andreas Østvik, Khuram Faraz +12 more

The paper introduces a novel simulation strategy that integrates speckle decorrelation measures from real videos to create a photorealistic dataset, enabling a deep learning algorithm that achieves st…

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cs.LGcs.AIRecentMay 29, 2026

Learning Cardiac Latent Representations in Vectorcardiogram Space

Bosong Huang, Panzhen Zhao, Zengxiang Li, Patricia Lee +4 more

This paper introduces LVCG, a novel self-supervised framework that learns unified, view-invariant latent representations of cardiac electrical activity directly in the physically grounded Vectorcardio…

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cs.ARRecentMay 31, 2026

OpenEye: A Scalable Open-Source Hardware Accelerator for DNNs

Denis Lebold, Hendrik Wöhrle

OpenEye is a scalable, sparsity-aware FPGA-based hardware accelerator designed to efficiently execute common deep neural network operations, demonstrating favorable performance-resource trade-offs acr…

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cs.CRcs.ARcs.LGRecentMar 20, 2026

Hawkeye: Reproducing GPU-Level Non-Determinism

Erez Badash, Dan Boneh, Ilan Komargodski, Megha Srivastava

Hawkeye is a system that allows perfect, precision-preserving reproduction of GPU-level matrix multiplication operations on a CPU, enabling efficient and trustworthy third-party auditing of machine le…

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cs.CRcs.ETRecentMay 9, 2026

Hardware-Accelerated Line-Rate Bitstream Screening for Secure FPGA Reconfiguration

Rye Stahle-Smith, Carter Antley, Jason D. Bakos, Rasha Karakchi

The paper introduces BLADEI, a hardware-accelerated framework that screens FPGA configuration bitstreams for anomalies in real-time, overcoming the latency bottleneck of traditional software-based det…

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cs.CRcs.AIRecentMay 21, 2026

A Constant-Time Implementation Methodology for Activation Functions on Microcontrollers

Andrii Tyvodar, Andreas Rechberger, Dirmanto Jap, Shivam Bhasin +3 more

The paper proposes a constant-time implementation methodology for activation functions on microcontrollers to prevent timing side-channel attacks during embedded neural-network inference.

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