Man Shi
1 indexed paper
Recent (6 mo)
1With code
0Influential cites
0Benchmarked
0Publications per year
126
Top categories
Architecture×1AI×1ML×1
Frequent co-authors
Research Timeline
2026
HiKV: Hierarchical Importance-Aware KV Cache with Hardware Acceleration for LLM Decoding
Proposed a novel algorithm-hardware co-design, HiKV, to tackle the memory bottleneck in long-context large language models by exploiting KV cache redundancy through hierarchical importance awareness, achieving up to 7.95x speedup and 90% energy reduction.
Highlighted terms show continued research focus across papers