Voktho Das
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2026
Secure eFPGA-Enabled Edge LLM Inference: Architectural and Hardware Countermeasures
The paper proposes a hybrid ASIC+eFPGA architecture to enhance the security and resilience of edge LLM inference accelerators against both runtime and supply-chain attacks.
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cs.CRRecentApr 24, 2026
Secure eFPGA-Enabled Edge LLM Inference: Architectural and Hardware Countermeasures
Voktho Das, M Zafir Sadik Khan, Jafar Vafaei, Kimia Azar +1 more
The paper proposes a hybrid ASIC+eFPGA architecture to enhance the security and resilience of edge LLM inference accelerators against both runtime and supply-chain attacks.
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