~ similar to 2603.29382v2· 20 results
Peipei Xie, Siwei Chen, Zejun Xiang, Shasha Zhang +1 more
This paper systematically performs a differential fault analysis (DFA) on the lightweight block cipher Lilliput, demonstrating that it is significantly vulnerable to practical fault attacks even under…
Xi Yang, Taolue Chen, Yuqi Chen, Fu Song +2 more
This paper introduces a novel algorithm, CiSC, to efficiently and optimally synthesize circuit implementations of linear codes for hardware security, significantly outperforming existing state-of-the-…
The paper introduces a Neural Stringology Cryptanalysis (NSC) framework that uses machine learning to detect subtle structural patterns in stream cipher keystreams, demonstrating its potential for eva…
The paper systematically characterizes the fault response of the Intel NCS2 accelerator to electromagnetic fault injection, revealing a major degradation mode that is undetectable by standard inferenc…
This paper investigates the vulnerability of machine learning-based fault detection and localization systems in Cyber-Physical Systems (CPS) to backdoor attacks, demonstrating that such attacks are su…
Jianan Mu, Ge Yu, Zhaoxuan Kan, Song Bian +5 more
This paper evaluates the vulnerability of Fully Homomorphic Encryption (FHE) computation to silent data corruption (SDC) using large-scale fault-injection experiments and theoretical analysis.
This paper presents a novel data-free Membership Inference Attack (MIA) that uses gradient inversion on Standard Cell Library Layouts (SCLLs) to reconstruct sensitive hardware images from intercepted…
The paper analyzes the security of a partially masked hardware accelerator for Number Theoretic Transform (NTT) in PQC, demonstrating that the claimed security margins are significantly overestimated…
The paper applies Stringology-Based Cryptanalysis (SBC) using KMP and Boyer-Moore algorithms to analyze EChaCha20, confirming that the cipher maintains strong pseudorandomness and exhibits rapid diffu…
Taibiao Zhao, Xiang Zhang, Mingxuan Sun, Ruyi Ding +1 more
The paper introduces a Spatiotemporal-Aware Fault Injection (STAFI) framework to efficiently locate and time critical bit-flip vulnerabilities in DNNs used for ADAS, significantly improving fault dete…
This survey reviews the integration of AI and LLMs into hardware security verification, demonstrating its potential to automate complex stages while stressing the necessity of grounding AI outputs in…
The paper analyzes LLM vulnerability detection using mechanistic interpretability, finding that models primarily rely on safety detectors rather than direct vulnerability signature recognition.
The paper analyzes the differential properties of the SIMON32 cipher, identifying high-probability differentials to improve the efficiency and depth of cryptanalysis beyond current state-of-the-art me…
The paper systematically evaluates various defense mechanisms against persistent memory attacks on LLM agents, finding that only tool-gating at the memory layer (Memory Sandbox) effectively mitigates…
This paper investigates the use of Federated Learning (FL) for hardware assurance, demonstrating that while FL improves model performance over centralized learning, it remains vulnerable to gradient i…
This paper provides the first comprehensive review of threats and defenses specifically targeting on-device AI inference, revealing a significant imbalance where certain attack types, like adversarial…
The paper proposes MAED, a novel algorithm-level error detection framework that uses mathematical identities to continuously validate non-linear activation functions, achieving high fault detection ra…
LIPPEN introduces a novel hardware-software co-design that provides strong, zero-overhead pointer encryption for enhanced memory safety, achieving comprehensive pointer integrity and confidentiality.
The paper introduces a novel hardware aging attack that exploits the commutative properties of addition to induce unbalanced stress on AI accelerator transistors, significantly degrading model accurac…
The paper proposes a resource-efficient, threshold-based authentication scheme for constrained IIoT devices using SRAM PUFs, addressing inherent unreliability through a combination of Hamming code err…