The paper proposes an energy-efficient method for implementing lightweight stream ciphers (Trivium and Grain-128a) within a memristive Computation In-Memory-Array (CIM-A) architecture for secure in-me…

The paper analyzes existing hardware Trojan datasets to demonstrate that standard cell libraries can be systematically exploited to create visually undetectable, stealthy hardware Trojans, exemplified…

The paper proposes a multi-ciphertext privacy-preserving framework to efficiently compute high-resolution image gradients using Fully Homomorphic Encryption (FHE) by dividing the large image into smal…

This paper introduces a dual-layer side-channel attack framework that exploits the variable workload introduced by dynamic image preprocessing in local Vision-Language Models (VLMs) to infer sensitive…

Quantum Gatekeeper is a robust, multi-factor context-bound image steganography framework that embeds payloads using LSB and derives a gate key from a Variational Quantum Circuit (VQC), ensuring recove…

The paper proposes a Ferroelectric Charge-Domain Compute Cell (FCDC) using HZO memcapacitors to perform attention computation, achieving significant energy efficiency gains, especially for long-reside…

This paper presents a novel data-free Membership Inference Attack (MIA) that uses gradient inversion on Standard Cell Library Layouts (SCLLs) to reconstruct sensitive hardware images from intercepted…

The paper proposes a resource-efficient, threshold-based authentication scheme for constrained IIoT devices using SRAM PUFs, addressing inherent unreliability through a combination of Hamming code err…

LIPPEN introduces a novel hardware-software co-design that provides strong, zero-overhead pointer encryption for enhanced memory safety, achieving comprehensive pointer integrity and confidentiality.

The paper proposes a hardware-efficient compound IC protection mechanism that combines lightweight cryptography with logic locking and hardware obfuscation to secure integrated circuits against variou…

This paper provides a comparative analysis and benchmarking of Secure Multi-Party Computation (SMPC) and Fully Homomorphic Encryption (FHE) for machine learning, finding that the optimal choice depend…

This paper investigates the potential of real-world Processing-in-Memory (PIM) architectures, specifically using UPMEM, to accelerate cryptographic algorithms, demonstrating that distributing computat…

The paper introduces FHE-DiCSNN, a novel framework that uses the TFHE scheme to enable secure and efficient computation on Spiking Neural Networks (SNNs), achieving high accuracy and fast inference ti…

This paper evaluates the vulnerability of Fully Homomorphic Encryption (FHE) computation to silent data corruption (SDC) using large-scale fault-injection experiments and theoretical analysis.

Tessera introduces a novel hardware architecture that achieves secure, near-line-rate weight streaming for DNNs on UMA edge accelerators by performing cache-line granularity decryption during DRAM fet…

The paper proposes a hybrid ASIC+eFPGA architecture to enhance the security and resilience of edge LLM inference accelerators against both runtime and supply-chain attacks.

The paper introduces BSGS-Diagonal, a memory-efficient algorithm, and GPU-optimized kernels to significantly accelerate and reduce the resource overhead of encrypted face recognition using Fully Homom…

This paper provides a comprehensive, system-level comparison of MPC and FHE for Privacy-Preserving Machine Learning (PPML) across various models and environments, moving beyond single-metric latency a…

The paper proposes Q-FE, a novel Quantum-Native 6G Far-Edge architecture that secures Industrial IoT Digital Twins by integrating micro-digital twins, compact post-quantum key exchange, and asynchrono…

This paper proposes training a single neural network using EM traces collected from multiple probe positions to detect cryptographic leakage across a larger area of a target device, validated by cross…