The paper systematically evaluates 27 Spiking Neural Network (SNN) configurations to determine the optimal combination of neuron model and spike encoding scheme for network intrusion detection, findin…

The paper evaluates 27 different Spiking Neural Network (SNN) configurations to determine the optimal design for network intrusion detection, finding that the LeakyParallel neuron combined with latenc…

This paper presents a unified framework for end-to-end co-design of neural network processors.

The paper introduces FHE-DiCSNN, a novel framework that uses the TFHE scheme to enable secure and efficient computation on Spiking Neural Networks (SNNs), achieving high accuracy and fast inference ti…

The paper demonstrates that quadratic integrate-and-fire (QIF) neurons are superior to leaky integrate-and-fire (LIF) neurons for gradient descent training in spiking neural networks because their con…

The paper proposes a constant-time implementation methodology for activation functions on microcontrollers to prevent timing side-channel attacks during embedded neural-network inference.

This paper analyzes the impact of long-term and short-term transistor aging on Deep Neural Network (DNN) inference accuracy and proposes an aging-aware retraining methodology to maintain performance e…

This paper presents BenDi, an energy-efficient quasi-stochastic systolic architecture for bioelectronic systems on the edge.

The paper introduces Spike-PTSD, a novel, biologically inspired adversarial attack framework that successfully compromises the robustness of Spiking Neural Networks (SNNs) by modeling abnormal neural…

The paper introduces a physics-informed active learning framework to optimize GaN tri-gate FinFETs for vertical power delivery, identifying a multi-fin device (D1) that significantly outperforms a sin…

OpenEye is a scalable, sparsity-aware FPGA-based hardware accelerator designed to efficiently execute common deep neural network operations, demonstrating favorable performance-resource trade-offs acr…

The paper proposes a novel convolutional block and optimization algorithm to implement resource-efficient 1D-CNNs for atrial fibrillation detection on tiny smart sensor systems, achieving high accurac…

The paper proposes a hybrid ASIC+eFPGA architecture to enhance the security and resilience of edge LLM inference accelerators against both runtime and supply-chain attacks.

StepPRM-RTL is a novel framework that enhances LLM-based RTL code generation for digital hardware designs.

This paper characterizes the gap between current DNN-based speech enhancement systems and hearing aid constraints, and proposes a lightweight architecture to meet these constraints.

CLANE presents an end-to-end continual action recognition system deployed on neuromorphic hardware (Intel Loihi 2) using event cameras, achieving high accuracy with massive reductions in energy and la…