ArXivCSExplorer
☆☆Bookmarks🏆RSSHow to UseFAQ
Built with and by Teycir Ben Soltane•
How to Use•FAQ•GitHub•arXiv.org•
Share:

20 results for “Block RAMs”

CS papers only

Hybrid search: Keyword + semantic, ranked by combined score.ⓘ

Want pure semantic search? Try claim verification →

cs.CRcs.ARRecentApr 22, 2026

PVAC: A RowHammer Mitigation Architecture Exploiting Per-victim-row Counting

Jumin Kim, Seungmin Baek, Hwayong Nam, Minbok Wi +2 more

The paper introduces PVAC, a novel victim-based row counting mechanism that accurately tracks RowHammer attacks by incrementing counters on the victim row, thereby improving hammering tolerance and pe…

View →
cs.CRRecentMay 17, 2026

Loaded Dice: Solving the Non-Selection Problem for Scalable Probabilistic RowHammer Defense

Jeonghyun Woo, Junsu Kim, Aamer Jaleel, Prashant J. Nair

The paper proposes PrISM, an intersection-based probabilistic mitigation technique that significantly improves the scalability of RowHammer defense at low thresholds by correlating sampled row history…

View →
cs.CRcs.AREmpiricalRecentJun 10, 2026

Partitioned Tags, Shared Data: Reconciling Strict Cache Isolation with Write-Shared Coherence

Kartik Ramkrishnan, Stephen McCamant, Antonia Zhai, Pen Chung Yew

This paper presents SCP, a cache partitioning design that combines strict eviction isolation with write-shared coherence to mitigate eviction-based cache side channels.

View →
cs.ARcs.PFRecentMay 30, 2026

Regular-Dead on Arrival: Characterizing and Protecting Against Dead-Entry TLB Misses in GPU Microarchitectures

Shafayat Mowla Anik, Yongchan Jung, Jeeho Ryoo, Byeong Kil Lee

The paper characterizes 'dead-entry' TLB misses in GPUs, which occur when recently evicted translations are immediately re-walked, and proposes DEPOT, a Bloom filter mechanism that significantly reduc…

View →
cs.DBcs.DCcs.PFEmpiricalRecentJun 26, 2026

DiStash: A Disaggregated Multi-Stash Transactional Key-Value Store

Yiming Gao, Hieu Nguyen, Jun Li, Shahram Ghandeharizadeh

This paper introduces DiStash, a disaggregated transactional key-value store that enables an application to use a single transaction to manage key-value pairs across different pools of stashes, preven…

View →
cs.AREmpiricalRecentJun 11, 2026

Ramulator 2.1: A Composable Memory System Simulator for Modern DRAM Systems

Haocong Luo, F. Nisa Bostancı, Ataberk Olgun, Maria Makeenkova +3 more

Ramulator 2.1 is an updated DRAM simulator with improved support for modern features, better usability, and comprehensive testing.

View →
cs.DSTheoreticalRecentJun 19, 2026

Online Stacking with a Few Load/Unload Points

Martin Olsen

A simple online algorithm is presented for the stacking problem to avoid shifts with a sufficient condition involving stacking area dimension, load/unload points, and maximum items.

View →
cs.CRcs.ARcs.LGRecentApr 19, 2026

Bit-Flip Vulnerability of Shared KV-Cache Blocks in LLM Serving Systems

Yuji Yamamoto, Satoshi Matsuura

The paper analyzes the bit-flip vulnerability of shared KV-cache blocks in LLM serving systems, demonstrating that these blocks are susceptible to silent, persistent, and selective data corruption.

View →
cs.CRcs.AIcs.CLRecentMay 26, 2026

Grounded Cache Routing for Retrieval-Augmented Generation: When Is It Safe to Reuse an Answer?

Syed Huma Shah

The paper proposes GroundedCache, an evidence-validated cache router that significantly improves the safety of reusing cached semantic answers in RAG systems by requiring multiple gates to validate th…

View →
cs.CRcs.ARRecentApr 27, 2026

RowHammer Vulnerability Counter (RVC): Redefining RowHammer Detection with Victim-Centric Tracking

Lavi Jain, Venkata Kalyan Tavva

The paper proposes Rowhammer Vulnerability Counter (RVC), a novel framework that improves RowHammer mitigation by tracking a row's actual vulnerability to bit flips rather than relying on simple activ…

View →
cs.CRcs.ITRecentMar 27, 2026

Cryptanalysis of a PIR Scheme based on Linear Codes over Rings

Luana Kurmann, Svenja Lage, Violetta Weger

This paper presents a cryptanalytic attack demonstrating that a specific code-based Private Information Retrieval (PIR) scheme can be broken, allowing the server to efficiently determine the requested…

View →
cs.ARcs.CRcs.OSEmpiricalRecentJul 20, 2026

Isolation Failure From Shared Storage: Characterizing and Exploiting Page-Cache SCA Leakage Across Containers and VMs

Alon Abudraham, Xingyu Chen, Itamar Levi, Ari Trachtenberg

This paper investigates the persistence of a timing side channel through the shared page cache in modern cloud platforms with various isolation mechanisms.

View →
cs.AREmpiricalRecentJul 4, 2026

TileLens: Efficiently Using Large-Granularity Memory Systems with Transparent Two-Dimensional Memory Layout

Jae Hyung Ju, Euijun Chung, Hritvik Taneja, Anish Saxena +3 more

This paper proposes TileLens, a system to mitigate read amplification in Large-Granularity Memory Systems (LGMS) for Large Language Model (LLM) inference by adopting a tile-major layout.

View →
cs.CRcs.AIcs.LGRecentMay 8, 2026

Defense effectiveness across architectural layers: a mechanistic evaluation of persistent memory attacks on stateful LLM agents

Jun Wen Leong

The paper systematically evaluates various defense mechanisms against persistent memory attacks on LLM agents, finding that only tool-gating at the memory layer (Memory Sandbox) effectively mitigates…

View →
cs.CRcs.ITTheoreticalRecentJul 27, 2026

An Attack on High Rate McEliece Cryptosystems Using Generalized Reed Solomon Codes with Weight $2$ Mask

Julia Lieb, Abhinaba Mazumder, Michael Schaller

The paper provides distinguishers for McEliece type cryptosystems with larger row and column weights, and presents a framework to turn distinguishers into key-recovery attacks. It successfully attacks…

View →
cs.DCcs.AIcs.OSEmpiricalRecentJul 2, 2026

Fine-Grained Computation Offload for Off-the-Shelf Servers in Tens of Lines

Bojie Li

The paper proposes a method to improve the performance of fine-grained offloads on servers by overlapping the offload with other requests using server-side routing.

View →
cs.PFcs.DCcs.OSEmpiricalRecentJun 22, 2026

LMS-AR: LMS Prediction-based Adaptive Regulator for Memory Bandwidth in Multicore Systems

Sudarshan Srinivasan, Deepak Gangadharan, Dip Goswami

This paper proposes LMS-AR, a memory bandwidth regulation mechanism for multi-core systems using a Linux kernel module with adaptive filtering for prediction and regulation.

View →
cs.DCcs.CREmpiricalRecentJun 26, 2026

RAMSES: Secure high-performance computing for sensitive data

Peter Heger, Lech Nieroda, Roland Pabel, Christoph Stollwerk +6 more

RAMSES is a new HPC system that integrates hardware-based memory encryption and state-of-the-art file encryption to deliver high performance and robust security.

View →