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Home/Authors/Haocong Luo

Haocong Luo

5 indexed papers

Recent (6 mo)
5
With code
0
Influential cites
0
Benchmarked
0

Publications per year

5
26

Top categories

Architecture×5Distributed×2Crypto×1Performance×1

Frequent co-authors

Ataberk Olgun5×
Onur Mutlu5×
Daichi Tokuda2×
Tatsuya Kubo2×
Geraldo F. Oliveira2×
Abdullah Giray Yağlıkçı2×

Research Timeline

2026
Ramulator 2.1: A Composable Memory System Simulator for Modern DRAM Systems

Ramulator 2.1 is an updated DRAM simulator with improved support for modern features, better usability, and comprehensive testing.

Extended Abstract: Re-Evaluating the Real-System Modeling Accuracy of Ramulator 2.0

The authors of Ramulator 2.0 simulator challenge the claims made in a research paper about its performance and propose best practices to avoid simulator usage errors.

PuDGhost: Experimental Analysis of Computation Result Corruption in Processing-using-DRAM Operations on Real DRAM Chips and Implications for Future Systems

This paper investigates and mitigates the interference phenomenon PuDGhost in Processing-using-DRAM (PuD) systems.

DejaVu: Why You Should Write to Your DRAM Rows Twice, Carefully

The paper demonstrates the DejaVu phenomenon in DRAM cells and its effects on read disturbance vulnerability.

Clutch: High Performance Vector-Scalar Comparison using DRAM via Chunked Temporal Coding

This paper proposes Clutch, a method to accelerate vector-scalar comparisons in Processing-using-DRAM systems.

Highlighted terms show continued research focus across papers

Papers

cs.ARcs.DCEmpiricalRecentJun 22, 2026

Clutch: High Performance Vector-Scalar Comparison using DRAM via Chunked Temporal Coding

Daichi Tokuda, Tatsuya Kubo, Ismail Emir Yuksel, Ataberk Olgun +7 more

This paper proposes Clutch, a method to accelerate vector-scalar comparisons in Processing-using-DRAM systems.

View →
cs.ARcs.CREmpiricalRecent
Jun 21, 2026

DejaVu: Why You Should Write to Your DRAM Rows Twice, Carefully

Haocong Luo, İsmail Emir Yüksel, Ataberk Olgun, Nisa Bostanci +3 more

The paper demonstrates the DejaVu phenomenon in DRAM cells and its effects on read disturbance vulnerability.

View →
cs.ARcs.DCEmpiricalRecentJun 17, 2026

PuDGhost: Experimental Analysis of Computation Result Corruption in Processing-using-DRAM Operations on Real DRAM Chips and Implications for Future Systems

Daichi Tokuda, İsmail Emir Yüksel, Tatsuya Kubo, Ataberk Olgun +6 more

This paper investigates and mitigates the interference phenomenon PuDGhost in Processing-using-DRAM (PuD) systems.

View →
cs.ARcs.PFEmpiricalRecentJun 12, 2026

Extended Abstract: Re-Evaluating the Real-System Modeling Accuracy of Ramulator 2.0

F. Nisa Bostanci, Haocong Luo, Ataberk Olgun, Maria Makeenkova +3 more

The authors of Ramulator 2.0 simulator challenge the claims made in a research paper about its performance and propose best practices to avoid simulator usage errors.

View →
cs.AREmpiricalRecentJun 11, 2026

Ramulator 2.1: A Composable Memory System Simulator for Modern DRAM Systems

Haocong Luo, F. Nisa Bostancı, Ataberk Olgun, Maria Makeenkova +3 more

Ramulator 2.1 is an updated DRAM simulator with improved support for modern features, better usability, and comprehensive testing.

View →