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20 results for “hardware counters”

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cs.CRRecentMar 31, 2026

HPCCFA: Leveraging Hardware Performance Counters for Control Flow Attestation

Claudius Pott, Luca Wilke, Jan Wichelmann, Thomas Eisenbarth

The paper introduces HPCCFA, a novel mechanism that leverages Hardware Performance Counters (HPCs) to provide hardware-backed Control Flow Attestation (CFA) on commodity CPUs, thereby enhancing the se…

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cs.CRcs.ARRecentApr 22, 2026

PVAC: A RowHammer Mitigation Architecture Exploiting Per-victim-row Counting

Jumin Kim, Seungmin Baek, Hwayong Nam, Minbok Wi +2 more

The paper introduces PVAC, a novel victim-based row counting mechanism that accurately tracks RowHammer attacks by incrementing counters on the victim row, thereby improving hammering tolerance and pe…

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cs.CRcs.ARRecentApr 27, 2026

RowHammer Vulnerability Counter (RVC): Redefining RowHammer Detection with Victim-Centric Tracking

Lavi Jain, Venkata Kalyan Tavva

The paper proposes Rowhammer Vulnerability Counter (RVC), a novel framework that improves RowHammer mitigation by tracking a row's actual vulnerability to bit flips rather than relying on simple activ…

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cs.DBcs.DCcs.PFEmpiricalRecentJun 26, 2026

DiStash: A Disaggregated Multi-Stash Transactional Key-Value Store

Yiming Gao, Hieu Nguyen, Jun Li, Shahram Ghandeharizadeh

This paper introduces DiStash, a disaggregated transactional key-value store that enables an application to use a single transaction to manage key-value pairs across different pools of stashes, preven…

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cs.AREmpiricalRecentJul 22, 2026

Revisiting Hardware Priority Queue Architectures

Qihang Wu, Austin Rovinski

The paper implements and evaluates several hardware priority queue architectures on modern FPGA platforms and provides a quantitative analysis.

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cs.AREmpiricalRecentJul 17, 2026

From Patterns to Parsers: Automatic Generation of Efficient Hardware Parsers for FPGAs

Tushar Garg, Andrew Boutros

This paper presents an open-source tool for generating efficient hardware parsers from high-level specifications using a decoupled parsing intermediate representation and custom symbolic tokens.

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cs.DCcs.OScs.PFEmpiricalRecentJul 18, 2026

Hardware-Transparent I/O Governance in Disaggregated Heterogeneous Storage

Rajarshi Chowdhury, Akshay Shah, Sue K. Lee

The I/O Resource Manager (IORM) is presented as a multi-stage distributed scheduler to maintain consistent performance and enforce global I/O limits in shared-nothing disaggregated storage clusters.

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cs.OScs.ARcs.NIEmpiricalRecentJul 17, 2026

Rethinking Polling Efficiency in Service Core Network Stacks

Matheus Stolet, Simon Peter, Antoine Kaufmann

This paper argues that idle cores on contemporary multicore processors can return compute capacity and proposes a budget-centric view of service core systems.

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cs.DCcs.DSTheoreticalRecentJun 15, 2026

Space-Efficient Lock-Free Linear-Probing Hash Table

Hagit Attiya, Rotem Oshman, Noa Schiller

This paper presents a lock-free linear-probing hash table with wait-free lookups, using a small amount of metadata and maintaining space efficiency.

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cs.CRRecentMar 25, 2026

Towards Remote Attestation of Microarchitectural Attacks: The Case of Rowhammer

Martin Herrmann, Oussama Draissi, Christian Niesler, Ahmad-Reza Sadeghi +1 more

The paper proposes HammerWatch, a novel remote attestation protocol that enables external verifiers to detect hardware-induced disturbances, specifically Rowhammer-like attacks, by analyzing memory-le…

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cs.DSTheoreticalRecentJun 19, 2026

Online Stacking with a Few Load/Unload Points

Martin Olsen

A simple online algorithm is presented for the stacking problem to avoid shifts with a sufficient condition involving stacking area dimension, load/unload points, and maximum items.

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cs.CRRecentMay 17, 2026

Loaded Dice: Solving the Non-Selection Problem for Scalable Probabilistic RowHammer Defense

Jeonghyun Woo, Junsu Kim, Aamer Jaleel, Prashant J. Nair

The paper proposes PrISM, an intersection-based probabilistic mitigation technique that significantly improves the scalability of RowHammer defense at low thresholds by correlating sampled row history…

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cs.CCmath.COTheoreticalRecentJun 28, 2026

On the Complexity of Counting Orderings in Graphs

Marcelo Arenas, María Alejandra Schild, Bernardo Subercaseaux

This paper shows #P-completeness for several graph counting problems using a new technique.

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cs.CRcs.AIEmpiricalRecentJul 2, 2026

Has This Checkpoint Been Abliterated? A Two-Signal Audit and Its Failure Map

Gabriel Hurtado

This paper proposes a threshold-free checkpoint audit method using two internal signals to detect if an open-weight checkpoint's refusal mechanism has been stripped.

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cs.CRcs.DCRecentApr 17, 2026

PoSME: Proof of Sequential Memory Execution via Latency-Bound Pointer Chasing with Causal Hash Binding

David L. Condrey

The paper introduces PoSME, a cryptographic primitive that enforces strict sequential memory execution by chaining data-dependent writes, providing verifiable delay and authorship attestation.

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cs.CRcs.SERecentMay 13, 2026

Automatic Detection of Reference Counting Bugs in Linux Kernel Drivers

Joe Hattori, Naoki Kobayashi, Ken Sakayori

The paper introduces DrvHorn, a novel automated tool that detects reference counting bugs in Linux kernel drivers by transforming the verification problem into an assertion checking task, successfully…

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cs.DBcs.DCcs.DSEmpiricalRecentJul 7, 2026

Efficient and Robust Lock-Free Multi-Word Compare-and-Swap via Contention-Aware Helping

Motoki Unno, Kento Sugiura, Yoshiharu Ishikawa

This paper introduces a new lock-free multi-word compare-and-swap algorithm with a contention-aware helping mechanism and version embedding approach to improve efficiency and consistency, achieving up…

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cs.ARcs.PFRecentMay 30, 2026

Regular-Dead on Arrival: Characterizing and Protecting Against Dead-Entry TLB Misses in GPU Microarchitectures

Shafayat Mowla Anik, Yongchan Jung, Jeeho Ryoo, Byeong Kil Lee

The paper characterizes 'dead-entry' TLB misses in GPUs, which occur when recently evicted translations are immediately re-walked, and proposes DEPOT, a Bloom filter mechanism that significantly reduc…

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