Farimah Farahmandi

Assertain is an automated framework that uses large language models and design analysis to generate high-quality, executable security assertions for hardware designs, significantly outperforming state-of-the-art models like GPT-5.

This survey reviews the integration of AI and LLMs into hardware security verification, demonstrating its potential to automate complex stages while stressing the necessity of grounding AI outputs in rigorous formal and simulation evidence.

This paper surveys the use of hardware emulation for security verification in System-on-Chip (SoC) design, positioning emulation as a critical, high-fidelity pre-silicon assurance technology.