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20 results for “Understanding of Reconfigurable Intelligent Surface (RIS)”

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eess.SPEmpiricalRecentJul 27, 2026

On-Site Beam Calibration for RIS-Aided Positioning Systems

Mengting Li, Hui Chen, Sigurd S. Petersen, Alireza Pourafzal +4 more

This paper proposes a framework for on-site calibration of Reconfigurable Intelligent Surface (RIS) beam response models to reduce positioning error floor.

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eess.SPmath.STEmpiricalRecentJul 25, 2026

GLRT for Reconfigurable Intelligent Surface aided Spectrum Sensing

Nikhilsingh Parihar, Praful Mankar, Sachin Chaudhari

This paper proposes a method for improving spectrum sensing in cognitive radio networks using reconfigurable intelligent surfaces (RIS) and generalised likelihood ratio test (GLRT) and energy detector…

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cs.NIeess.SPEmpiricalRecentJul 29, 2026

Active Movable-Element RIS Assisted Vehicular Semantic Communications: Modeling and Optimization

Maoxin Ji, Qiong Wu, Jingbo Zhang, Pingyi Fan +4 more

This paper proposes a Row-Movable Active Reconfigurable Intelligent Surface (RM-A-RIS) system for vehicular semantic communication, enhancing spatial diversity and improving Sum-Semantic Spectral Effi…

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cs.ITSurveyRecentJun 10, 2026

Reconfigurable Antennas for Next-generation Mobile Communication Networks: A Comprehensive Survey and Tutorial

Yizhe Zhao, Long Zhang, Halvin Yang, Kun Yang +3 more

This paper presents a comprehensive survey on reconfigurable antennas for next-generation mobile networks, focusing on their potential and applications.

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cs.ARRecentMay 29, 2026

A Reconfigurable Computing In-Memory Macro with Charge-sharing-based Weighted Accumulator

Junyi Yang, Shuai Dong, Zhengnan Fu, Hongyang Shang +1 more

The paper proposes a highly reconfigurable 256x128 in-memory computing array that significantly improves efficiency and performance for analog computing by introducing novel components for ADC, weight…

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eess.SPcs.ITEmpiricalRecentJun 18, 2026

Hybrid TRP-UE Sensing for Enhanced Target Localization

Necati Kagan Erkek, Marco Di Renzo, Arman Shojaeifard, Yasser Mestrah +3 more

This paper proposes a hybrid TRP-UE sensing mechanism for Integrated Sensing and Communication (ISAC) systems to improve network-based sensing performance in challenging indoor factory environments.

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cs.ITcs.CReess.SPRecentMar 30, 2026

Secret Key Rate Analysis of RIS-Assisted THz MIMO CV-QKD Systems under Localized and Global Eavesdropping

Sushil Kumar, Soumya P. Dash, George C. Alexandropoulos

This paper analyzes the secret key rate of RIS-assisted THz MIMO CV-QKD systems under various eavesdropping scenarios, demonstrating that the RIS significantly enhances secure communication range and…

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eess.SPTheoreticalRecentJul 27, 2026

Stacked Intelligent Metasurfaces Assisted UAV Communications

Chandan Kumar Sheemar, Giovanni Iacovelli, Sourabh Solanki, Wali Ullah Khan +1 more

This paper proposes an unmanned aerial vehicle (UAV) communication system assisted by stacked intelligent metasurfaces (SIMs) for energy-efficient hybrid beamforming and maximizes sum-rate for multi-u…

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cs.ARcs.AIRecentMay 30, 2026

LP5X-PIM Sim: A High-Fidelity HW/SW Integrated Simulator for LPDDR5X-PIM

SangHoon Cha, Jaewan Choi, Byeongho Kim, Yoonah Paik +2 more

This paper introduces a high-fidelity, integrated hardware-software simulator for LPDDR5X-PIM, enabling precise evaluation of system performance and energy efficiency.

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cs.CYcs.CRRecentJun 2, 2026

Designing a Hardware Reverse Engineering Course: Lessons from Eight Years in a Rapidly Evolving Tech Domain

Zehra Karadağ, René Walendy, Carina Wiesen, Christof Paar +2 more

This paper details the design and evolution of a Hardware Reverse Engineering (HRE) course, providing key lessons for educators teaching rapidly changing technical domains.

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cs.AReess.SYEmpiricalRecentJul 24, 2026

Reducing Instruction-Fetch Energy in RISC-V for Embedded AI Processing via Dynamic and Static Loop Caching

Wiebren Wijnstra, Sameed Sohail, Berend-Jan van der Zwaag, Sabih Gerez +1 more

This paper presents two loop cache architectures for RISC-V processors to reduce instruction fetches and energy consumption during AI inference.

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cs.ARRecentMay 27, 2026

FT-Pilot: Automated Fault-Tolerant RTL Rewriting via Vulnerability-Guided LLMs

Weixing Liu, Zizhen Liu, Jing Ye, Naixing Wang +3 more

FT-Pilot is a novel GNN-guided LLM framework that automatically rewrites RTL code to harden digital circuits against soft errors, providing an efficient, automated path for reliability optimization.

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cs.CRRecentMar 18, 2026

SoK: From Silicon to Netlist and Beyond $-$ Two Decades of Hardware Reverse Engineering Research

Zehra Karadağ, Simon Klix, René Walendy, Felix Hahn +4 more

This paper systematizes two decades of hardware reverse engineering research by analyzing 187 publications, identifying key technical methods and recommending improvements for reproducibility, standar…

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cs.CRcs.AIRecentMay 28, 2026

The Surface You Test Is Not the Surface That Breaks

Shifat E Arman, Syed Nazmus Sakib, Nafiul Haque, Shahrear Bin Amin

The vulnerability of LLM agents to prompt injection depends not on the specific channel (tool output vs. tool description) but on the interaction between the model and the surface.

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cs.CRcs.AIRecentMay 28, 2026

The Surface You Test Is Not the Surface That Breaks

Shifat E Arman, Syed Nazmus Sakib, Nafiul Haque, Shahrear Bin Amin

The vulnerability of LLM agents to prompt injection depends not on the specific channel (tool output vs. tool description) but on the interaction between the model and the surface itself.

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cs.CRRecentApr 3, 2026

Security Analysis of Universal Circuits as a Mechanism for Hardware Obfuscation

Zain Ul Abideen, Deepali Garg, Lawrence Pileggi, Samuel Pagliarini

This paper evaluates the security of Universal Circuits (UCs) for hardware obfuscation, demonstrating that they are effective against both oracle-guided and oracle-less attacks.

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