20 results for “sparse tile execution”
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Afzal Ahmad, Gaoyu Mao, Shoubo Hu, Hui-Ling Zhen +3 more
A co-designed hardware-software approach for task-conditional sparsity in multi-task inference models, reducing FLOPs, latency, and energy.
The paper introduces Grid Programs, a novel, Turing-complete model of computation where programs are two-dimensional arrangements of instructions, fundamentally departing from linear code structures.
Jae Hyung Ju, Euijun Chung, Hritvik Taneja, Anish Saxena +3 more
This paper proposes TileLens, a system to mitigate read amplification in Large-Granularity Memory Systems (LGMS) for Large Language Model (LLM) inference by adopting a tile-major layout.
Zhiwen Mo, Yu Cheng, Lei Wang, Zhengju Tang +11 more
TileSight is a tile-centric performance-modeling tool that predicts single-GPU kernel latency and cache hit rates with low error, outperforming state-of-the-art baselines and transferring well across…
This paper introduces Stale Synchronous Parallel mode of execution for parallel sparse triangular linear system solve and presents a scheduler that achieves geometric-mean speed-ups of 7-30% over Grow…
First implementation of a 3D Gaussian renderer on an Intelligence Processing Unit (IPU) with 1,472 independent tiles using only on-chip SRAM.
The paper characterizes 'dead-entry' TLB misses in GPUs, which occur when recently evicted translations are immediately re-walked, and proposes DEPOT, a Bloom filter mechanism that significantly reduc…
The paper introduces performance ruggedness analysis to quantify performance variance in GEMM workloads, proposing a two-stage software stack that significantly smooths the performance landscape and b…
This paper explores five methods for making a linked list work efficiently with multiple threads, from using one big lock to a lock-free design.
AI-PROPELLER introduces a novel interprocedural code layout optimization system that uses an agentic evolutionary workflow to achieve significant, measurable performance gains in large-scale, real-wor…
Ya Zhang, Tong Lei, Yao Chen, Yonggang Che +3 more
This paper introduces CW-Ghost, a method for estimating cache line fill volume and determining helper-thread prefetching granularity based on cache capacity constraints.
This paper presents a method for compressing matrices using a RePair straight-line program (SLP), allowing matrix-vector products with time and space proportional to the compressed size, and demonstra…
Yidong Zhao, Lars Blatny, Xiang Feng, Mikkel M. Juel +2 more
This paper proposes a unified sparse background-grid framework for the Material Point Method (MPM), significantly reducing computational time and memory usage in large-scale simulations where the mate…
Hyunwoo Oh, Suyeon Jang, Hanning Chen, Sanggeon Yun +2 more
The paper presents ExaGEMM, a framework for designing and exploring CPU-native low-bit GEMM via register-resident LUT execution.
This paper compares three neuromorphic core designs for handling weight sparsity in event-driven neural networks and quantifies the performance and energy costs.
The paper proposes FOAM, an adaptive damping method that stabilizes the Shampoo optimization algorithm by dynamically controlling damping and eigendecomposition frequency, thereby reducing staleness-i…
This paper introduces new algorithms for finding prime numbers up to a given bound, achieving a speedup of log N over the sieve of Eratosthenes.