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~ similar to 2604.03813v2· 20 results

cs.CRRecentApr 16, 2026

Structural Dependency Analysis for Masked NTT Hardware: Scalable Pre-Silicon Verification of Post-Quantum Cryptographic Accelerators

Ray Iskander, Khaled Kirah

The paper introduces a four-stage structural dependency analysis hierarchy that enables scalable, sound first-order masking verification for large, production-level post-quantum cryptographic accelera…

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cs.CRRecentApr 22, 2026

Fresh Masking Makes NTT Pipelines Composable: Machine-Checked Proofs for Arithmetic Masking in PQC Hardware

Ray Iskander, Khaled Kirah

The paper provides machine-checked proofs demonstrating that fresh per-stage arithmetic masking ensures pipeline-level security for Number Theoretic Transform (NTT) accelerators used in Post-Quantum C…

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cs.CRRecentApr 20, 2026

From Finite Enumeration to Universal Proof: Ring-Theoretic Foundations for PQC Hardware Masking Verification

Ray Iskander, Khaled Kirah

The paper provides the first machine-checked universal proof, using ring theory, that value-independence implies identical marginal distributions for arithmetic masking, thereby extending the verifica…

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cs.CRRecentMar 19, 2026

Controller Datapath Aware Verification of Masked Hardware Generated via High Level Synthesis

Nilotpola Sarma, Vaishali Ghanshyam Chaudhuri, Chandan Karfa

The paper proposes MaskedHLSVerif, a novel formal verification toolflow that accurately verifies the Power Side Channel Attack (PSCA) security of masked hardware generated by High Level Synthesis (HLS…

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cs.CRRecentApr 24, 2026

Secure eFPGA-Enabled Edge LLM Inference: Architectural and Hardware Countermeasures

Voktho Das, M Zafir Sadik Khan, Jafar Vafaei, Kimia Azar +1 more

The paper proposes a hybrid ASIC+eFPGA architecture to enhance the security and resilience of edge LLM inference accelerators against both runtime and supply-chain attacks.

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cs.CRcs.SCmath.NTRecentMay 17, 2026

Explicit cost analysis of Toom-4 multiplication for incomplete NTT in lattice-based cryptography

Sakura Oku, Momonari Kudo

This paper provides an explicit cost analysis of Toom-4 multiplication specifically tailored for the incomplete Number Theoretic Transform (NTT) framework, offering a concrete cost model for hybrid la…

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cs.CRcs.ARcs.LGRecentMay 11, 2026

LLMs for Secure Hardware Design and Related Problems: Opportunities and Challenges

Johann Knechtel, Ozgur Sinanoglu, Ramesh Karri

This review analyzes the dual impact of integrating Large Language Models (LLMs) into hardware design, detailing both their transformative potential in EDA and the critical security vulnerabilities th…

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cs.CRcs.ARcs.PFRecentMar 19, 2026

Benchmarking NIST-Standardised ML-KEM and ML-DSA on ARM Cortex-M0+: Performance, Memory, and Energy on the RP2040

Rojin Chhetri

This paper provides the first systematic, isolated benchmarks of NIST-standardized post-quantum cryptography (ML-KEM and ML-DSA) on the highly constrained ARM Cortex-M0+ processor, showing performance…

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cs.CRRecentMay 4, 2026

The 1-Bit Barrier is Universal: k-Stage Pipeline Composition and Unified Leakage Bounds for Standard Modular Reductions in PQC Hardware

Ray Iskander, Khaled Kirah

This paper proves that the per-observation leakage bound for deep, multi-stage masked Number Theoretic Transform (NTT) pipelines remains constant and low ($2/q$), regardless of the pipeline's depth ($…

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cs.CRcs.AIRecentMay 6, 2026

On the (In-)Security of the Shuffling Defense in the Transformer Secure Inference

Zhengyi Li, Yakai Wang, Kang Yang, Yu Yu +5 more

This paper demonstrates a novel attack against the shuffling defense used in secure Transformer inference, showing that randomly permuted activations can still be exploited to recover model weights.

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cs.CRRecentApr 27, 2026

Machine-Checked Cardinality Bounds for Masked Barrett Reduction: A 1-Bit Side-Channel Leakage Barrier in Post-Quantum Cryptographic Hardware

Ray Iskander, Khaled Kirah

The paper establishes a universal, machine-checked 1-Bit Barrier for the internal wire map of masked Barrett reduction, providing a strong side-channel leakage bound for post-quantum cryptography.

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cs.ARcs.CRRecentMay 11, 2026

ObfAx: Obfuscation and IP Piracy Detection in Approximate Circuits

Lukas Sekanina, Vojtech Mrazek

The paper introduces a novel threat model, approximate obfuscation, and proposes a framework to detect IP piracy in approximate circuits by comparing their statistical error profiles.

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cs.CRcs.LGRecentMay 29, 2026

Bit-Exact AI Inference Verification Without Performance Tradeoffs

Naci Cankaya

The paper proposes a method for bit-exact verification of AI inference outputs without sacrificing performance, demonstrating that deterministic, precise re-computation is possible even across differe…

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cs.CRRecentApr 28, 2026

Prime-Field PINI: Machine-Checked Composition Theorems for Post-Quantum NTT Masking

Ray Iskander, Khaled Kirah

The paper establishes the first machine-checked composition theorems for arithmetic masking over prime fields, demonstrating that fresh random masking between pipeline stages completely erases securit…

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cs.CRcs.AIcs.LGRecentMay 8, 2026

Seed Hijacking of LLM Sampling and Quantum Random Number Defense

Ziyang You, Xiaoke Yang, Zhanling Fan, Feng Guo +2 more

The paper introduces SeedHijack, a backdoor attack that manipulates the pseudorandom number generation process in LLMs to force specific token selections, and proposes a hardware quantum random number…

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cs.CRcs.LGRecentMay 13, 2026

DiffusionHijack: Supply-Chain PRNG Backdoor Attack on Diffusion Models and Quantum Random Number Defense

Ziyang You, Liling Zheng, Xiaoke Yang, Xuxing Lu

The paper introduces DiffusionHijack, a supply-chain backdoor attack that compromises the PRNG used by diffusion models to deterministically control generated images, which is successfully mitigated b…

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cs.CRcs.LOcs.SERecentApr 4, 2026

Optimal Circuit Synthesis of Linear Codes for Error Detection and Correction

Xi Yang, Taolue Chen, Yuqi Chen, Fu Song +2 more

This paper introduces a novel algorithm, CiSC, to efficiently and optimally synthesize circuit implementations of linear codes for hardware security, significantly outperforming existing state-of-the-…

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cs.CRcs.ARRecentMar 28, 2026

Attacking AI Accelerators by Leveraging Arithmetic Properties of Addition

Masoud Heidary, Biresh Kumar Joardar

The paper introduces a novel hardware aging attack that exploits the commutative properties of addition to induce unbalanced stress on AI accelerator transistors, significantly degrading model accurac…

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cs.CRcs.AIRecentMay 27, 2026

Blind PRNG Hijacking: An Undetectable Integrity-Preserving Attack Against LLM Watermarking

Ziyang You, Huilong He, Xiaoke Yang, Xuxing Lu

The paper introduces SeedHijack, a novel, undetectable supply-chain attack that biases LLM watermarking signals by hijacking the underlying Pseudo-Random Number Generator (PRNG) without altering the g…

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cs.CRcs.AIRecentMay 27, 2026

Blind PRNG Hijacking: An Undetectable Integrity-Preserving Attack Against LLM Watermarking

Ziyang You, Huilong He, Xiaoke Yang, Xuxing Lu

The paper introduces SeedHijack, a novel, undetectable supply-chain attack that biases LLM watermarking signals by hijacking the underlying PRNG, thereby amplifying the watermark without altering the…

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