This paper proposes CUTh-Solver, a GPU-accelerated Preconditioned Conjugate Gradient (PCG)-based sparse solver framework for high-resolution 3D IC thermal simulation, achieving significant speedup ove…

This paper proposes a GPU-accelerated framework for analyzing effective resistance in 3D IC power delivery networks, achieving significant speedup with negligible error.

This paper introduces a high-fidelity, integrated hardware-software simulator for LPDDR5X-PIM, enabling precise evaluation of system performance and energy efficiency.

This paper enhances open-source FPGA CAD tools to model and explore inter-die routing architectures for 2.5D and 3D FPGAs, demonstrating that these architectures can significantly improve performance…

First implementation of a 3D Gaussian renderer on an Intelligence Processing Unit (IPU) with 1,472 independent tiles using only on-chip SRAM.

The paper introduces the EXTRA homogenization method, which enables accurate and computationally efficient 3D magneto-thermal finite-element simulation of large-scale HTS magnets by selectively resolv…

The paper presents SABLE, an NDA-safe framework that allows large language models to optimize analog circuits in industrial EDA tools while protecting proprietary information.

This paper investigates the thermal constraints of deploying AI compute infrastructure in space, comparing GPUs and compute-in-memory (CIM) accelerators using a co-design methodology.

The paper proposes a visual program synthesis framework using a VLM to generate accurate training data for semiconductor inspection, mitigating the sim-to-real gap by applying input binarization to st…

This paper introduces BigPower, a hierarchical source-level surrogate model for fine-grained module-level power estimation during CPU design using large language models and architectural hierarchy.

This paper investigates the energy efficiency of Large Language Model (LLM) serving using emerging memory technologies, specifically monolithic 3D (M3D) integration, and presents simulation results sh…

This paper introduces PDAGENT-BENCH, a comprehensive benchmark for evaluating Large Language Models and vision-language models in the physical design stack of Very Large-Scale Integrated Circuits.

The authors of Ramulator 2.0 simulator challenge the claims made in a research paper about its performance and propose best practices to avoid simulator usage errors.

The paper proposes a Ferroelectric Charge-Domain Compute Cell (FCDC) using HZO memcapacitors to perform attention computation, achieving significant energy efficiency gains, especially for long-reside…

The paper introduces a physics-informed active learning framework to optimize GaN tri-gate FinFETs for vertical power delivery, identifying a multi-fin device (D1) that significantly outperforms a sin…

This paper proposes a thermodynamic computing stack for machine learning using stochastic analog processes and energy-based models.

The paper introduces a design-oriented methodology and a closed-form macromodel to quantify how noise coupled through Through-Silicon Vias (TSVs) degrades the spectral purity of sensitive RF oscillato…

The paper introduces performance ruggedness analysis to quantify performance variance in GEMM workloads, proposing a two-stage software stack that significantly smooths the performance landscape and b…